1. Select Base Part
2. Customize
3. Confirmation
Configure Your Customized Si567 Oscillator
Please correct the errors marked with an *
Output Frequencies
What is this?
Enter your requested frequencies. Device is factory-customized to support any combination of frequencies.
LVPECL/LVDS/CML = 0.2 to 3000 MHz
HCSL = 0.2 to 400 MHz
CMOS/Dual CMOS = 0.2 to 250 MHz
Error Message
Frequency A: (FS1 = 0, FS0 = 0)
*
MHz
Error Message
Frequency B: (FS1 = 0, FS0 = 1)
*
MHz
Error Message
Frequency C: (FS1 = 1, FS0 = 0)
*
MHz
Error Message
Frequency D: (FS1 = 1, FS0 = 1)
*
MHz
Additional Specifications
Output Format and Supply Voltage:
CML: 1.8 V, 2.5 V, 3.3 V
CMOS: 1.8 V, 2.5 V, 3.3 V
Complementary dual CMOS: 1.8 V, 2.5 V, 3.3 V
HCSL-Fast: 1.8 V, 2.5 V, 3.3 V
HCSL: 1.8 V, 2.5 V, 3.3 V
In-phase dual CMOS: 1.8 V, 2.5 V, 3.3 V
LVDS: 1.8 V, 2.5 V, 3.3 V
LVPECL: 2.5 V, 3.3 V
One orderable part number supports all VDDs shown
Temperature Stability:
20 ppm
Total Stability = Temperature Stability + Initial Accuracy + Load Pulling + VDD variation + Aging for 20yrs at 70C
Invalid Package and Stability combination
Tuning Slope:
105 ppm/V
150 ppm/V
180 ppm/V
225 ppm/V
60 ppm/V
75 ppm/V
Invalid stability and tuning slope combination.
Minimum APR:
*
VDD=3.3V: 20; VDD=2.5V: --; VDD=1.8V: --
OE Pin Location and Polarity:
OE Pin2, Active High
OE Pin2, Active Low
OE = Output Enable
Package Option:
2.5x3.2 mm
3.2x5 mm
5x7 mm
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Block Diagram
Data Sheet